VSN-2036 : Defining multiple & all items selection & unselection logic in the prepared circuits list.

Merge Request Overview

This Merge Request introduces a complete selection mechanism for Prepared Circuits, enabling users to select circuits individually, partially, or in bulk through a dedicated selection column. The implementation follows the same conceptual model used previously for prepared passengers, ensuring consistency across the application while adapting the logic to circuit-specific requirements.

The work covers state management, selection flags, toggle logic, component wiring, and UI integration, resulting in a robust and scalable selection feature for prepared circuits.

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Scope and Objectives

The main objectives of this MR are:

• Introduce a reliable state to track selected prepared circuits.
• Support individual, partial, and full selection behaviors.
• Provide reusable selection utilities via a dedicated hook.
• Integrate selection logic across table head, rows, and manager components.
• Ensure clean propagation of selection state and handlers.
• Maintain clean and maintainable code by removing redundant or incorrect references.

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Detailed Changes Breakdown

1. Selection State Definition

• Introduced a dedicated state to store selected circuit row identifiers.
• This state acts as the single source of truth for circuit selection.
• Enables consistent tracking of user interactions across the table.

Commits involved

• feat : Circuit state defined

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2. Selection Flags

• Added two derived flags:
  • allSelected: indicates when all visible circuits are selected.
  • partiallySelected: indicates when only a subset of circuits is selected.
• These flags are computed based on the selected rows state and total rows.

Commits involved

• feat : Selection flags

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3. Toggle Logic

• Implemented selection logic for:
  • Individual circuit row toggling.
  • Global toggle (select all / unselect all).
• Logic ensures correct synchronization between state and flags.

Commits involved

• feat : Toggling logic

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4. Exposition of Selection Utilities

• Exposed selection state, flags, and handler functions from the circuit selection hook.
• Ensures reusability and clean separation of concerns.
• Retrieved these utilities in the main circuit list view.

Commits involved

• feat : elements exposition & retrieval

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5. Component Contract Updates

• Added toggleRow as a parameter to:
  • Circuit table component.
  • Circuit table row component.
• Added selectedRows as an explicit parameter to relevant components to control UI state.

Commits involved

• feat : Adding parameter of toggleRow
• feat : Defining selected rows param

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6. Individual Row Selection

• Added checkbox selection at the row level.
• Each row reflects its selection state based on selectedRows.
• Individual toggling updates global state correctly.

Commits involved

• feat : Individual checkbox selection defined

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7. Table Header Enhancements

• Introduced a new prepared circuits table header.
• Header contains a master checkbox to:
  • Select all circuits.
  • Unselect all circuits.
• Header checkbox reacts dynamically to allSelected and partiallySelected flags.

Commits involved

• feat : New header defined
• fix : Referencing new prepared circuits head

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8. Propagation of Selection Handlers

• Propagated toggleRow through all necessary component layers.
• Ensured toggleAll is available at the table manager level.
• Passed selection flags (allSelected) to enable correct header rendering.

Commits involved

• feat : toggle row invocation
• feat : Selected rows invocation
• feat : toggle all function propagated
• feat : all selected flag propagated
• feat : passing toggle all

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Resulting Behavior

With this MR applied:

• Users can select circuits individually via row checkboxes.
• Users can select or unselect all circuits using the table header checkbox.
• Partial selection is visually and logically handled.
• Selection state remains consistent across views and components.
• The implementation is modular, extensible, and aligned with existing selection patterns.

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Technical Notes

• The design favors explicit prop passing over implicit state access.
• Selection logic is isolated, testable, and reusable.
• No breaking changes introduced to unrelated features.
• Code cleanup ensures maintainability and readability.

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Conclusion

This MR successfully implements a full-featured selection system for prepared circuits, laying the foundation for future actions such as bulk operations, exports, or validations. The solution is consistent with existing patterns, scalable, and cleanly integrated into the current architecture.

Closes VSN-2036